1. Field of the Invention
The present invention relates to integrated circuits.
2. Description of Related Art
Persons of ordinary skill in the art understand terms and basic concepts related to microelectronics that are used in this disclosure, such as PMOS (p-channel metal-oxide semiconductor) transistor, NMOS (p-channel metal-oxide semiconductor) transistor, “inductor,” “capacitor,” “resistor,” “voltage,” “current,” “current-source,” “circuit node,” “low-pass filter,” “pre-amplifier,” “comparator,” “clock,” and “latch.” Terms and basic concepts like these are apparent from prior art documents, e.g. text books such as “Design of Analog CMOS Integrated Circuits” by Behzad Razavi, McGraw-Hill (ISBN 0-07-118839-8), and thus will not be explained in detail here.
An integrated circuit (IC) comprises a large number transistors fabricated on a silicon. The integrated circuit is packaged in a package so that it can be placed as an IC component on a printed circuit board. The integrated circuit receives power from a power supply circuit on the printed circuit board.
As depicted in FIG. 1A, an application 100 comprises: a power supply circuit 130 and an IC component 140. The power supply circuit 130 provides a power supply voltage Vps for IC component 140. The IC component 140 comprises an integrated circuit 110 and a package 120, which can be behaviorally modeled as a circuit comprising a combination of a shunt capacitor 122 and a serial inductor 123. The voltage that the integrated circuit 110 actually receives is an internal power supply voltage Vdd, which is different from Vps that the power supply circuit 130 provides. The integrated circuit 110 comprises a large number of transistors working on a variety of tasks that vary from time to time, and the current I that the integrated circuit 110 is sinking also varies from time to time, due to a dynamic nature of the activities of the integrated circuit 110. As a result, the received voltage Vdd is also dynamically changing in accordance with the activities of the integrated circuit 110.
An exemplary waveform is shown in FIG. 1B. Trace 180 denotes the current I that the integrated circuit 110 is sinking; trace 190 denotes the internal power supply voltage Vdd. As shown in FIG. 1B, a sudden surge of the current (due to a sudden increase in circuit activities) induces a bouncing of the voltage due to an interplay between the inductor 123, the capacitor 122, and the integrated circuit 110. The phenomenon that the internal power supply voltage Vdd starts ringing upon a sudden surge of current of the integrated circuit 110 is known as “power bouncing.” Power bouncing is highly undesirable, as it makes the integrated circuit 110 less reliable. A package with smaller inductance can be used to alleviate the power bouncing problem; however, a lower inductance package is usually more expensive.
What is desired is a method and apparatus for reducing power bouncing without using low inductance package.